1. Field of the Invention
The present invention relates to semiconductor test apparatuses, and more particularly to a semiconductor test apparatus applying a power supply voltage to a semiconductor device having a capacitance between a power supply terminal and a ground terminal to measure a power supply current.
2. Description of the Background Art
FIG. 4 is a circuit block diagram showing a structure of a conventional semiconductor test apparatus.
Referring to FIG. 4, the semiconductor test apparatus has a bypass capacitor 50 (capacitance) connected between a power supply terminal 41 and a ground terminal 42 of a semiconductor integrated circuit device to be tested (referred to as IC hereinafter) 40. Bypass capacitor 50 is provided to remove noise and prevent oscillation. It is assumed that bypass capacitor 50 of FIG. 4 represents both an external capacitor connected to IC 40 for testing and an internal capacitor provided in advance in IC 40.
The semiconductor test apparatus includes a controller 30, a D/A converter 31, resistance elements 32, 33 and 35, operational amplifiers 34 and 36, and an A/D converter 37. Controller 30 is formed of a personal computer, for example, to provide control as follows. After a digital code is applied to D/A converter 31 and a power supply voltage Vcc is applied to IC 40, waiting is conducted for a power supply current Icc of IC 40 to be stabilized at an elapse of a predetermined time. Then, power supply current Icc of IC 40 is obtained according to a digital code from A/D converter 37.
D/A converter 31 converts a digital code from controller 30 into an analog voltage. Operational amplifier 34 and resistance elements 32 and 33 form an amplifier to amplify the analog voltage from D/A converter 31 to generate power supply voltage Vcc of IC 40. Resistance element 35 is provided to convert current I1 flowing to power supply terminal 41 of IC 40 from operational amplifier 34 into a voltage. More specifically, resistance element 32 is connected between an output terminal of D/A converter 31 and a non-inverting input terminal of operation amplifier 34. Resistance element 33 is connected between the non-inverting input terminal of operational amplifier 34 and power supply terminal 41 of IC 40. Resistance element 35 is connected between the output terminal of operational amplifier 34 and power supply terminal 41 of IC 40. The non-inverting input terminal of operational amplifier 34 and ground terminal 42 of IC 40 are connected to ground.
Operational amplifier 36 amplifies the voltage across the electrodes of resistance element 35, i.e., the voltage across power supply terminal 41 of IC 40 and the output terminal of operational amplifier 34. A/D converter 37 converts output voltage V1 of operational amplifier 36 into a digital code which is applied to controller 30.
The operation of this semiconductor test apparatus will be described hereinafter.
When an IC 40 is set at the semiconductor test apparatus, a digital code is applied from controller 30 to D/A converter 31, whereby power supply voltage Vcc is applied from operational amplifier 34 to power supply terminal 41 of IC 40 via resistance element 35. Current I1 flowing to IC 40 from operational amplifier 34 is converted into a voltage by resistance element 35. This voltage is amplified by operational amplifier 36. Output voltage V1 of operational amplifier 36 is converted into a digital code by A/D converter 37 to be provided to controller 30. According to this digital code, power supply current Icc of IC 40 is obtained by controller 30. Power supply current Icc of IC 40 is shown on a display screen 30a of controller 30.
In this conventional semiconductor test apparatus, application of power supply voltage Vcc to power supply terminal 41 of IC 40 causes an excessive current I2 to be conducted to bypass capacitor 50 to result in variation in current I1=Icc+I2. Therefore, there was an appreciable time after power supply voltage Vcc is applied and until excessive current I2 is attenuated to allow measurement of power supply current Icc of IC 40. The testing of IC 40 was time consuming to result in increase in the cost for testing, which in turn caused increase in the cost of IC 40.